三维晶片堆栈封装的底部填充关键技术的研究
序号 | 标题 | 类型 | 作者 |
---|---|---|---|
1 | 3D Chip Stacking with Through Silicon-Vias for Vertical Interconnect and Underfill Dispensing | 期刊论文 | Fuliang Le;Shi-Wei Ricky Lee;Qiming Zhang |
2 | Effect of Material Properties and Bump Parameters on Capillary Filling in Through-Silicon-Via Underfill Dispensing | 会议论文 | Fuliang Le;Shi-Wei Ricky Lee;Mian Tao;Jeffery CC Lo |
3 | Characterization of Copper Diffusion in Through Silicon Vias | 专著 | Zhang Xiaodong;Shi-Wei Ricky Lee;Fuliang Le |