支持高速缓存一致的片上网络关键技术研究
序号 | 标题 | 类型 | 作者 |
---|---|---|---|
1 | Obstacle-avoiding and slew-constrained buffered clock tree synthesis for skew optimization | 会议论文 | Niu, Feifei1|Zhou, Qiang1|Yao, Hailong1|Cai, Yici1|Yang, Jianlei1|Sze, C.N.2| |
2 | FPGA-specific custom VLIW architecture for arbitrary precision floating-point arithmetic | 期刊论文 | Lei, Yuanwu1|Dou, Yong1|Zhou, Jie1| |
3 | A Novel Cache Replacement Policy via Dynamic Adaptive Insertion and Re-Reference Prediction | 期刊论文 | Zhang, Xi|Li, Chongmin|Liu, Zhenyu|Wang, Haixia|Wang, Dongsheng|Ikenaga, Takeshi| |
4 | 基于FPGA的列选主元LU分解方法 | 专利 | 邬贵明; 窦 勇; 夏 飞; 姜晶菲; 周 杰 |
5 | A timing-perspective study on the wire model in placement | 会议论文 | Liu, Liu1|Lu, Yongqiang2|Zhou, Qiang1| |
6 | SAM: A fault-tolerant scalable address mapping method in last-level cache | 期刊论文 | Li, Chong-Min1|Wang, Dong-Sheng1|Wang, Hai-Xia1|Xue, Yi-Bo1| |
7 | Implementation of rotation invariant multi-view face detection on FPGA | 会议论文 | Xu, Jinbo1|Dou, Yong1|Tang, Yuxing1|Wang, Xiaodong1| |
8 | Fast placement for large-scale hierarchical FPGAs | 会议论文 | Dai, Hui1|Zhou, Qiang1|Cai, Yici1|Bian, Jinian1|Hong, Xianlong1| |
9 | An efficient lightweight shared cache design for chip multiprocessors | 会议论文 | Wang, Jinglei|Wang, Dongsheng|Xue, Yibo|Wang, Haixia| |
10 | A fine-classification method and its hardware acceleration architecture for rotation invariant multi-view face detection | 期刊论文 | Xu, Jinbo1|Dou, Yong1| |
11 | FPGA accelerating double/quad-double high precision floating-point applications for ExaScale computing | 会议论文 | Dou, Yong1|Lei, Yuanwu1|Wu, Guiming1|Guo, Song1|Zhou, Jie1|Shen, Li1| |
12 | 基于FastPlace总体布局算法的实现 | 期刊论文 | 王似飞|闫海霞|钱旭|吕勇强|马小伟|周强|WANG Si-fei1,2,YAN Hai-xia1,QIAN Xu2,LV Yong-qiang| |
13 | A Reconfigurable Architecture for Rotation Invariant Multi-View Face Detection Based on a Novel Two-Stage Boosting Method | 期刊论文 | Xu, Jinbo|Dou, Yong|Pang, Zhengbin| |
14 | Behavioral level dual-Vth design for reduced leakage power with thermal awareness | 会议论文 | Yu, Junbo1|Zhou, Qiang1|Qu, Gang2|Bian, Jinian1| |
15 | 2-Omega新型会议网络的设计与分析 | 期刊论文 | 徐志广|任开新|于璠|XU Zhi-guang,REN Kai-xin,YU Fan (School of Compute| |
16 | A detailed router for hierarchical FPGAs based on simulated evolution | 会议论文 | Zhu, Ke1|Cai, Yici1|Zhou, Qiang1|Hong, Xianlong1| |
17 | Enhanced adaptive insertion policy for shared caches | 会议论文 | Li, Chongmin1|Wang, Dongsheng1|Xue, Yibo1|Wang, Haixia1|Zhang, Xi1| |
18 | Network Caching for Chip Multiprocessors | 会议论文 | Jinglei Wang|Dongsheng Wang|Yibo Xue|Haixia Wang| |
19 | Special-purposed VLIW architecture for IEEE-754 quadruple precision elementary functions on FPGA | 会议论文 | Lei, Yuanwu1|Dou, Yong1|Shen, Li1|Zhou, Jie1|Guo, Song1| |
20 | 融合自动化逆向和聚类分析的协议识别方法 | 期刊论文 | 李城龙|薛一波|汪东升|LI Chenglong 1,2 , XUE Yibo 1,3+ , WANG Dongsheng| |
21 | A read-write aware replacement policy for phase change memory | 会议论文 | Zhang, Xi1|Hu, Qian1|Wang, Dongsheng1|Li, Chongmin1|Wang, Haixia1| |
22 | 一种多倍数据供应的编译优化方法 | 期刊论文 | 彭飞|顾乃杰|高翔|孙明明|PENG Fei1,2,3,GU Nai-jie1,2,3,GAO Xiang4,SUN Ming-| |
23 | Partition-based global placement considering wire-density uniformity for CMP variations | 期刊论文 | Dong, Changdao1|Zhou, Qiang1|Cai, Yici1|Liu, Dawei1| |
24 | Hierarchical Cache Directory for CMP | 期刊论文 | Guo, Song-Liu|Wang, Hai-Xia|Xue, Yi-Bo|Li, Chong-Min|Wang, Dong-Sheng| |
25 | A thermal-driven force-directed floorplanning algorithm for 3D ICs 1 | 会议论文 | Huang, Yun1|Zhou, Qiang1|Cai, Yici1|Yan, Haixia1| |
26 | 基于龙芯3A的LAPACK函数优化 | 期刊论文 | 张斌|顾乃杰|何颂颂|刘斌斌| |
27 | Storage device performance prediction with selective bagging classification and regression tree | 会议论文 | Zhang, Lei1|Liu, Guiquan1|Zhang, Xuechen2|Jiang, Song2|Chen, Enhong1| |
28 | 基于全展开的全流水128位精度浮点累加器 | 专利 | 窦勇; 雷元武; 郭松 |
29 | 一种基于相变内存的读写区分数据存储替换方法 | 专利 | 汪东升; 张熙; 王海霞; 胡倩 |
30 | 一种基于图像纹理和运动特征的运动预测方法 | 专利 | 刘振宇; 朱佳; 汪东升 |
31 | A fine-grained pipelined implementation for large-scale matrix inversion on FPGA | 会议论文 | Zhou, Jie1|Dou, Yong1|Zhao, Jianxun2|Xia, Fei1|Lei, Yuanwu1|Tang, Yuxing1| |
32 | FPGA implementation of variable-precision floating-point arithmetic | 会议论文 | Lei, Yuanwu1|Dou, Yong1|Guo, Song1|Zhou, Jie1| |
33 | 考虑重叠度和线长的布局模块分布密度平滑方法 | 专利 | 周强; 刘大为; 蔡懿慈; 闫海霞 |
34 | High precision scientific computation accumulator on FPGA | 期刊论文 | Lei, Yuan-Wu1|Dou, Yong1|Guo, Song1| |
35 | Cycle-Accurate 64+-Core FPGA-Based Hybrid Simulator | 会议论文 | Liu Genxian|Li Guohong|Gao Peng|Qu hao|Liu Zhenyu|Wang Haixia|Xue Yibo|Wang Dongsheng| |
36 | VPFPAP: A special-purpose VLIW processor for variable-precision floating-point arithmetic | 会议论文 | Lei, Yuanwu1|Dou, Yong1|Zhou, Jie1|Wang, Sufeng1| |
37 | Design and Implementation of the Parameterized Multi-Standard High-Throughput Radix-4 Viterbi Decoder on FPGA | 期刊论文 | Li, Rongchun|Dou, Yong|Lei, Yuanwu|Ni, Shice|Guo, Song| |
38 | A High Performance and Memory Efficient LU Decomposer on FPGAs | 期刊论文 | Wu, Guiming|Dou, Yong|Sun, Junqing|Peterson, Gregory D.| |
39 | Accurate and fast cell spreading for force directed placement | 会议论文 | Wang, Sifei1, 2|Zhou, Qiang2|Qian, Xu1|Cai, Yici2|Gao, Wenchao1, 2|Zhou, Wenjun1| |
40 | Improve clock gating through power-optimal enable function selection | 会议论文 | Chen, Juanjuan1|Wei, Xing1|Jiang, Yunjian2|Zhou, Qiang1| |
41 | Register Length Analysis and VLSI Optimization of VBS Hadamard Transform in H.264/AVC | 期刊论文 | Liu, Zhenyu|Zhou, Junwei|Wang, Dongsheng|Ikenaga, Takeshi| |
42 | An analytical placement technique for large-scale FPGAs | 期刊论文 | Gao, Wenchao1, 3|Zhou, Qiang1|Lu, Yongqiang2|Yan, Haixia1|Qian, Xu3| |
43 | Dynamic reusability-based replication with network address mapping in CMPs | 会议论文 | Wang, Jinglei1|Wang, Dongsheng1|Wang, Haixia1|Xue, Yibo1| |
44 | Blocking LU decomposition for FPGAs | 会议论文 | Wu, Guiming1|Dou, Yong1|Peterson, Gregory D.2| |
45 | 基于线性规划的最小扰动标准单元合法化算法 | 期刊论文 | 陈福真|闫海霞|吕勇强|周强|CHEN Fuzhen,YAN Haixia,Lü Yongqiang,ZHOU Qiang(Dep| |
46 | A unified co-processor architecture for matrix decomposition | 期刊论文 | Dou, Yong1|Zhou, Jie1|Wu, Gui-Ming1|Jiang, Jing-Fei1|Lei, Yuan-Wu1|Ni, Shi-Ce1| |
47 | 支持高速缓存一致的片上网络系统及数据请求方法 | 专利 | 王惊雷; 汪东升 |
48 | Architecture and Circuit Optimization of Hardwired Integer Motion Estimation Engine for H.264/AVC | 期刊论文 | Liu, Zhenyu|Wang, Dongsheng|Ikenaga, Takeshi| |
49 | Power optimization through edge reduction in LUT-based FPGA technology mapping | 会议论文 | Chen, Juanjuan1|Wei, Xing1|Zhou, Qiang1|Cai, Yici1| |
50 | Coherent temporal streams in PARSEC | 会议论文 | Abid Mughal, M.1|Wang, Haixia1|Wang, Dong Sheng1| |
51 | 用于多核处理器的网络共享Cache及其目录控制方法 | 专利 | 王惊雷; 汪东升 |
52 | 面向稀疏矩阵访存特性的Cache划分 | 期刊论文 | 邓林|窦勇|郑义|DENG Lin , DOU Yong , ZHENG Yi( School of Computer| |
53 | Markov clustering based placement algorithm for island-style FPGAs | 会议论文 | Dai, Hui1|Zhou, Qiang1|He, Ou1|Bian, Jinian1| |
54 | A fast routability-driven router for hierarchical FPGA | 期刊论文 | Zhou, Qiang1, 2|Zhang, Xingxing1, 2|Cai, Yici1, 2| |
55 | Peak temperature control in thermal-aware behavioral synthesis through allocating the number of resources | 会议论文 | Yu, Junbo1|Zhou, Qiang1|Bian, Jinian1| |
56 | 面向龙芯3A体系结构的BLAS库优化 | 期刊论文 | 何颂颂|顾乃杰|朱海涛|刘燕君|HE Song-song1,2,GU Nai-jie1,2,ZHU Hai-tao1,3,LIU Y| |
57 | 一种近似无阻塞的置换三级Clos网 | 期刊论文 | 于璠|任开新|徐志广|刘燕君|YU Fan1,2,REN Kai-xin1,2,XU Zhi-guang1,2,LIU Yan-j| |
58 | Proximity-aware cache Replication | 会议论文 | Li, Chongmin1, 2|Wang, Dongsheng1, 2|Wang, Haixia1, 2|Xue, Yibo1, 2|Li, Jian3| |
59 | Stochastic prefix-based fault tolerant source routing algorithm for network on chip | 会议论文 | Xu, Gengchun1|Ren, Kaixin1|Gu, Naijie1| |
60 | 一种利用图建模的宏模块合法化算法 | 期刊论文 | 吴鑫|闫海霞|钱旭|吕勇强|刁屹|周强|WU Xin1,2,YAN Hai-xia1,QIAN Xu2,LV Yong-qiang3,DIA| |
61 | Fast hierarchical cache directory: A scalable cache organization for large-scale CMP | 会议论文 | Li, Chongmin1|Wang, Haixia2|Xue, Yibo2|Zhang, Xi1|Wang, Dongsheng1, 2| |
62 | FPGA accelerating three QR decomposition algorithms in the unified pipelined framework | 会议论文 | Yong Dou1|Jie Zhou1|Xiaoyang Chen1|Yuanwu Lei1|Jinbo Xu1| |
63 | A fine-grained pipelined implementation of the LINPACK benchmark on FPGAs | 会议论文 | Wu, Guiming1|Dou, Yong1|Lei, Yuanwu1|Zhou, Jie1|Wang, Miao1|Jiang, Jingfei1| |
64 | Fast placement algorithm for hierarchical FPGAs | 期刊论文 | Dai, Hui1|Zhou, Qiang1|Bian, Jinian1|Zeng, Xiangzhi2| |
65 | 基于龙芯3B的H.264解码器的向量化 | 期刊论文 | 裴晓航|何颂颂|Pei Xiaohang He Songsong(School of Computer Scienc| |
66 | 用于多核处理器的Cache的主动复制方法及系统 | 专利 | 王惊雷; 汪东升 |
67 | A cache replacement policy using adaptive insertion and re-reference prediction | 会议论文 | Zhang, Xi1|Li, Chongmin1|Wang, Haixia1|Wang, Dongsheng1| |
68 | R-ADMAD: High reliability provision for large-scale de-duplication archival storage systems | 会议论文 | Liu, Chuanyi|Gu, Yu|Sun, Linchun|Yan, Bin|Wang, Dongsheng| |
69 | Wear-resistant hybrid cache architecture with phase change memory | 会议论文 | Guo, Sanchuan1|Liu, Zhenyu1|Wang, Dongsheng1|Wang, Haixia1|Li, Guohong1| |
70 | Network Victim Cache: Leveraging Network-on-Chip for Managing Shared Caches in Chip Multiprocessors | 会议论文 | Jinglei Wang|Dongsheng Wang|Yibo Xue|Haixia Wang| |
71 | 多核龙芯3A上二级BLAS库的优化 | 期刊论文 | 李毅|何颂颂|李恺|LI Yi,HE Song-Song,LI Kai(School of Computer Scien| |
72 | 一种多核处理器高速缓存及其管理方法 | 专利 | 汪东升; 李国红; 刘振宇 |
73 | Analyzing off-chip misses in PARSEC for prefetching | 期刊论文 | Mughal, M. Abid1|Wang, Haixia1|Wang, Dongsheng1| |
74 | A reliable detail placement tool for mixed mode IE design | 会议论文 | Chen, Fuzhen1|Yan, Haixia1|Lv, Yongqiang1|Zhou, Qiang1| |
75 | FPGA accelerator for protein secondary structure prediction based on the GOR algorithm | 期刊论文 | Xia, Fei|Dou, Yong|Lei, Guoqing|Tan, Yusong| |
76 | A fast routability-driven router for hierarchical FPGAs based on tabu search | 会议论文 | Zhang, Xingxing1|Zhou, Qiang1|Cai, Yici1| |
77 | A DyadicCluster method used for nonlinear placement | 会议论文 | Gao, Wenchao1, 2|Zhou, Qiang2|Qian, Xu1|Cai, Yici2| |
78 | 大矩阵QR分解的FPGA设计与实现 | 期刊论文 | 周杰|陈啸洋|赵建勋|窦勇|ZHOU Jie1,CHEN Xiao-yang1,ZHAO Jian-xun2,DOU Yong1|2.Academy of Armored Forces Engineering,Beijing 10| |
79 | Markov Clustering-Based Placement Algorithm for Hierarchical FPGAs | 期刊论文 | Dai Hui1|Zhou Qiang1|Bian Jinian1| |
80 | 一种严格非阻塞Clos型波分复用光置换网络 | 期刊论文 | 刘燕君|任开新|梁娟娟|裴晓航|LIU Yan-jun1,2,REN Kai-xin1,2,LIANG Juan-juan1,2,P| |
81 | TIPO: A heuristic algorithm for delay constrained power optimization | 会议论文 | Zhou, Shuzhe1|Yao, Hailong1|Zhou, Qiang1| |
82 | MCC: A message and command correlation method for identifying new interactive protocols via session analyses | 期刊论文 | Li, Chenglong1, 3|Xue, Yibo1, 2|Dong, Yingfei4|Wang, Dongsheng1, 2| |
83 | An optimized hierarchical cache design based on data access features | 期刊论文 | 李崇民|王海霞|张熙|汪东升|LI Chong-Min WANG Hai-Xia ZHANG Xi WANG Dong-Sheng| |
84 | A novel cache organization for tiled chip multiprocessor | 会议论文 | Zhang, Xi|Wang, Dongsheng|Xue, Yibo|Wang, Haixia|Wang, Jinglei| |
85 | Peak Temperature Reduction by Physical Information Driven Behavioral Synthesis with Resource Usage Allocation | 期刊论文 | Yu, Junbo|Zhou, Qiang|Qu, Gang|Bian, Jinian| |
86 | 基于H.264/AVC中CABAC的并行编码实现电路及编码方法 | 专利 | 刘振宇; 汪东升 |
87 | Fast congestion-aware timing-driven placement for Island FPGA | 会议论文 | Zhao, Jinpeng1|Zhou, Qiang1|Cai, Yici1| |
88 | A design of embedding rewiring into routing for FPGA improvement | 会议论文 | Wong, Yuetling1|Zhou, Qiang1|Bian, Jinian1| |
89 | Cholesky分解细粒度并行算法 | 期刊论文 | 邬贵明|窦勇|王淼|WU Gui-ming,DOU Yong,WANG Miao(School of Computer| |
90 | 线长驱动的层次式FPGA布局算法 | 期刊论文 | 张峥|周强|钱旭|刘攀|曹雪|ZHANG Zheng1,ZHOU Qiang2,QIAN Xu1,LIU Pan1,CAO Xue|2.Dept.of Computer Science & Technology,Tsinghua U| |
91 | CCNoC: Cache-Coherent Network on Chip for Chip Multiprocessors | 期刊论文 | Wang, Jing-Lei|Xue, Yi-Bo|Wang, Hai-Xia|Li, Chong-Min|Wang, Dong-Sheng| |
92 | Fine-grained parallel RNA secondary structure prediction using SCFGs on FPGA | 期刊论文 | Xia, Fei|Dou, Yong|Zhou, Dan|Li, Xin| |
93 | Mix storage architecture for block level continuous data protection | 期刊论文 | Sheng, Yonghong1|Liu, Rui1|Wang, Dongsheng1|Ju, Dapeng1| |
94 | Multilevel Optimization for Large-Scale Hierarchical FPGA Placement | 期刊论文 | Dai, Hui|Zhou, Qiang|Bian, Ji-Nian| |
95 | 差量存储的集中式文件级连续数据保护方法 | 期刊论文 | 生拥宏|刘川意|鞠大鹏|汪东升| |
96 | Wirelength optimization for multilevel hierachical FPGA | 会议论文 | Zeng, Xiangzhi1|Zhou, Qiang1|Cai, Yici1|Hong, Xianlong1| |
97 | 一种基于仿生原理的Sobel算子容错方法 | 期刊论文 | 吕启|窦勇|徐佳庆|冯雪|LV Qi1 DOU Yong1 XU Jia-qing1 FENG Xue2 (School of| |
98 | Multi-core optimization for conjugate gradient benchmark on heterogeneous processors | 期刊论文 | Deng Lin|Dou Yong| |
99 | High performance cache block replication using re-reference probability in CMPs | 会议论文 | Wang, Jinglei1|Wang, Dongsheng1|Wang, Haixia1|Xue, Yibo1| |
100 | Reliability provision mechanism for large-scale de-duplication storage systems | 期刊论文 | Gu Yu1|Liu Chuanyi1|Sun Linchun1|Yan Bin1|Wang Dongsheng1|Ju Dapeng2| |
101 | 对基于随机上下文无关文法的RNA二级结构预测进行加速的方法 | 专利 | 夏飞; 窦勇; 姜晶菲; 周杰; 邬贵明; 雷元武 |
102 | A new design of nonblocking permutation WDM networks based on three-stage clos network | 会议论文 | Liu, Yanjun1| |
103 | GPU上的矩阵乘法的设计与实现 | 期刊论文 | 梁娟娟|任开新|郭利财|刘燕君|LIANG Juan-Juan,REN Kai-Xin,GUO Li-Cai,LIU Yan-Jun| |
104 | 用于多核处理器的网络牺牲Cache及基于该Cache的数据请求方法 | 专利 | 王惊雷; 汪东升 |
105 | Efficient Hierarchical Algorithm for Mixed Mode Placement in Three Dimensional Integrated Circuit Chip Designs | 期刊论文 | Yan, Haixia1|Zhou, Qiang1|Hong, Xianlong1|Li, Zhuoyuan1| |
106 | A new model of nonblocking multicast WDM optical switching network with reduced complexity | 会议论文 | Liu, Yanjun1| |
107 | A two-phase differential synchronization algorithm for remote files | 会议论文 | Sheng, Yonghong1|Xu, Dan2|Wang, Dongsheng1, 3| |
108 | ONE-ROUND RENORMALIZATION BASED 2-BIN/CYCLE H.264/AVC CABAC ENCODER | 会议论文 | 刘振宇|汪东升| |
109 | A high effective indexing and retrieval method providing block-level timely recovery to any point-in-time | 会议论文 | Sheng, Yonghong1|Xu, Dan2|Wang, Dongsheng1, 3| |
110 | Timing-driven placement via preassigning cell | 期刊论文 | Liu, Dawei1, 2|Zhou, Qiang1, 2|Bian, Jinian1, 2| |
111 | HARDWARE OPTIMIZATIONS OF VARIABLE BLOCK SIZE HADAMARD TRANSFORM FOR H.264/AVC FREXT | 会议论文 | Liu, Zhenyu|Wang, Dongsheng|Ikenaga, Takeshi| |
112 | Scalable proximity-aware cache replication in chip multiprocessors | 会议论文 | Li, Chongmin1|Wang, Haixia1|Xue, Yibo1|Wang, Dongsheng1|Li, Jian2| |
113 | 龙芯3A处理器上FFT的高效实现 | 期刊论文 | 郭利财|刘燕君|GUO Li-cai1,LIU Yan-jun2 1(School of Computer Scie| |