动态可重构专用片上网络架构综合关键技术研究

61674133
2016
F0402.集成电路设计
陈松
面上项目
副教授
中国科学技术大学
16万元
动态可重构;系统级芯片;布图规划;高层次综合;专用片上网络
2017-01-01到2017-12-31
  • 中英文摘要
  • 结题摘要
  • 结题报告
  • 项目成果
  • 项目参与人
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序号 标题 类型 作者
1 Reconfigurable topology synthesis for application-specific noc on partially dynamically reconfigurable FPGAs 会议论文 Jinglei Huang;Xiaodong Xu;Lan Yao;Song Chen
2 High Throughput Hardware Architecture for Accurate Semi-Global Matching 期刊论文 Yan Li;Zhiwei Li;Chen Yang;Wei Zhong;Song Chen
3 AutoNFT: Architecture Synthesis for Hardware DFT of Length of Coprime-Number Products 期刊论文 Gan Feng;Lan Yao;Song Chen
4 Memristor-Based Material Implication Logic Design for Full Adders 会议论文 Mengting Li;Wenhao Sun;Song Chen;Feng Wu
5 An Integrated Optimization Framework for Partitioning, Scheduling and Floorplanning on Partially Dynamically Reconfigurable FPGAs 会议论文 Xiaodong Xu;Qi Xu;Jinglei Huang;Song Chen
6 Integer Linear Programming Based Fault-Tolerant Topology Synthesis for Application-Specific NoC 会议论文 Zhigang Li;Jinglei Huang;Qi Xu;Song Chen
7 Fast thermal analysis for fixed-outline 3D floorplanning 期刊论文 Qi Xu;Song Chen
8 Lagrangian relaxation-based routing path allocation for application-specific network-on-chips 期刊论文 Jinglei Huang;Wei Zhong;Zhigang Li;Song Chen
9 A Fully Pipelined Hardware Architecture for Convolutional Neural Network with Low Memory Usage and DRAM Bandwidth 会议论文 Zhiwei Li;Yan Li;Song Chen;Feng Wu
10 High Throughput Hardware Architecture for Accurate Semi-Global Matching 会议论文 Yan Li;Chen Yang;Wei Zhong;Song Chen
11 Clustered Fault Tolerance TSV Planning for 3D Integrated Circuits 期刊论文 Qi Xu;Song Chen;Xiaodong Xu;Bei Yu
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